`timescale 1ns/1ns
`include "uvm_macros.svh"

import uvm_pkg::*;
`include "fifo_driver.sv"
`include "fifo_if.sv"
`include "fifo_env.sv"
`include "fifo_monitor.sv"
`include "fifo_agent.sv"
`include "fifo_sequence.sv"
`include "fifo_sequencer.sv"

module top_tb; 
  fifo_if intf();
  
  
  ASFIFO 
    #(.WIDTH(16),.PTR(4))
  ASFIFO
  (
  .wrclk(intf.wrclk),
  .rdclk(intf.rdclk),
  .rd_rst_n(intf.rd_rst_n),
  .wr_rst_n(intf.wr_rst_n),
  .wr_en(intf.wr_en),
  .rd_en(intf.rd_en),
  .wr_data(intf.wr_data),
  .rd_data(intf.rd_data),
  .wr_full(intf.wr_full),
  .rd_empty(intf.rd_empty)
  ); 
  
  initial begin
    run_test("fifo_env");  
  end
  
  initial begin
    uvm_config_db#(virtual fifo_if)::set(null, "uvm_test_top.i_agt.drv", "vif", intf);
	uvm_config_db#(virtual fifo_if)::set(null, "uvm_test_top.i_agt.mon", "vif", intf);
	uvm_config_db#(virtual fifo_if)::set(null, "uvm_test_top.o_agt.mon_o", "vif", intf);
  end
endmodule
